The present invention is related generally to electronic devices whose functional scales are measured in nanometers, and, more particularly, to forming one-dimensional epitaxial crystals with widths and heights at the nanometer scale.
The synthesis of artificial low-dimensional structures to confine electrons has been a topic of scientific and technical interest for decades. Epitaxial deposition techniques have made possible the growth of two-dimensional quantum wells as thin as one atomic layer and xe2x80x9czeroxe2x80x9d-dimensional islands as small as a few nanometers. However, the formation of robust xe2x80x9conexe2x80x9d-dimensional nanowires with a width less than 10 nm has been a major goal that has proven difficult to achieve by either epitaxial growth or lithographic processing. Various xe2x80x9cself-assemblyxe2x80x9d techniques, in which structures form spontaneously under kinetic or thermodynamic control, have been used to grow wire-like structures directly on a semiconductor surface. Previous demonstrations include decoration of step edges on substrates, the preferential capture of adatoms onto an oriented string of dangling bonds at a surface, the growth of a lattice-matched epilayer with anisotropic surface energy, and the growth of a lattice-mismatched epitaxial layer on a low symmetry substrate with a large anisotropic stiffness. Each of these techniques depends on some type of symmetry-breaking phenomenon at the substrate surface to encourage linear growth along a preferred direction. However, they often produce wire-like structures that meander along with the steps, are terminated by single steps, have irregular shapes and sizes, and/or are not robust.
In general, an atomically flat two-dimensional epitaxial overlayer can be grown when the lattice constant of the epilayer matches that of the substrate on which it is grown. As the lattice-mismatch increases (xe2x89xa79%), the strain energy in the deposited film can be relaxed by the creation of islands of the epitaxial material. In the cases of the most often studied systems, e.g., Ge on Si(001) and InAs on GaAs(001), both the substrate surfaces and the overlayers have fourfold crystallographic symmetry with respect to the surface normal. These lattice-mismatched systems will thus limit the lateral growth in all directions on the substrate surface and produce strained islands. This suggests a strategy for the intentional epitaxial growth of linear structures: choose an overlayer material that is closely lattice matched to the substrate along one major crystallographic axis but has a significant lattice mismatch along the perpendicular axis. In principle, this should allow the unrestricted growth of the epitaxial crystal in the first direction but limit the width in the other.
In the above-referenced co-pending application, self-assembled epitaxial nanowires comprising an epitaxial crystal comprising a first material (e.g., a metal silicide) are grown on a crystal substrate comprising a second material (e.g., silicon). The wires normally have the widths from 1 to 100 nm and lengths from 10 nm to 10 xcexcm. The formation mechanism of the metal silicide wires is due to the asymmetry of lattice mis-matches between metal silicide and the silicon substrate. The present inventors have discovered that metal silicide nanowires grown on Si form a natural shadow mask for etching silicon. Such masks are ordinarily difficult to make on a nanoscale, due partly to the extremely small dimensions and due partly to the need to employ materials having differential etch rates.
The silicon nanowires are critical elements for future nanoscale electronic and opto-electronic devices. A method for using self-assembled nanowires as a shadow mask to fabricate Si nanowires can be very important. Further, the use of self-assembled nanowires as a mask for fabricating nanowires of other materials can also be very important.
In accordance with the present invention, self-organized, or self-assembled, nanowires having a first composition are used as an etching mask for fabricating nanowires having a second composition. The process for forming such nanowires of the second composition comprises:
(a) providing an etchable layer having the second composition and having a buried insulating layer beneath a major surface thereof;
(b) growing self-assembled nanowires having the first composition on the surface of the etchable layer; and
(c) anisotropically etching portions of the etchable layer down to the insulating layer, using the self-assembled nanowires as a mask, to form the nanowires of the second composition.
The self-assembled nanowires may subsequently be removed from the etched nanowires or left in place.
Further in accordance with the present invention, self-organized, or self-assembled, metal silicide nanowires may be used as an etching mask for silicon nanowire fabrication. The process for forming such Si nanowires comprises:
(a) providing a silicon substrate having a buried insulating layer beneath a major surface thereof;
(b) growing self-assembled nanowires on the silicon surface; and
(c) anisotropically etching silicon down to the insulating layer, using the self-assembled nanowires as a mask, to form the silicon nanowires.
As above, the self-assembled nanowires may subsequently be removed from the silicon nanowires or left in place.
The present invention provides a means to form essentially one-dimensional crystalline nanowires with widths and heights at the nanometer scale, and lengths at the micrometer scale, which are aligned along certain crystallographic directions with high crystal quality. Further, the present invention avoids traditional lithography methods, minimizes environmental toxic chemicals usage, simplifies the manufacturing processes, and allows the formation of high-quality one-dimensional nanowires over large areas.